Many electronic devices on the market today often use power converters to convert electric energy from one form to another (e.g., converting between alternating current and direct current), converting a voltage or current of an electrical signal, modifying a frequency of an electrical signal, or some combination of the above. Examples of power converters may include boost converters and buck converters. Such power converters are often used to convert an input voltage for other circuitry, wherein such converted voltage is greater than (e.g., if a boost converter is used) or less than (e.g., if a buck converter is used) than the input voltage. FIG. 1 illustrates an example circuit 100 comprising a boost converter 102 for converting an input source voltage VBAT to produce a supply voltage VSUPPLY for a switched output stage 104 of an amplifier (e.g., an audio amplifier), as is known in the art. In FIG. 1, boost converter 102 comprises an inductor 106 coupled at a first terminal to an input source voltage VBAT and coupled at a second terminal to non-gate terminals of each of switches 108 and 110. Boost converter 102 shown in FIG. 1 also comprises a switch 108 (e.g., an n-type metal-oxide-semiconductor field effect transistor) coupled at one non-gate terminal to a ground voltage and coupled at its other non-gate terminal to inductor 106 and a non-gate terminal of switch 110, and a switch 110 (e.g., a p-type metal-oxide-semiconductor field effect transistor) coupled at one non-gate terminal to inductor 106 and a non-gate terminal of switch 108 and coupled at its other non-gate terminal to a terminal of capacitor 107. Boost converter 102 shown in FIG. 1 also includes a capacitor 107 coupled between a non-gate terminal of switch 110 and a ground voltage. Predriver circuit 116 may receive an input control voltage vCTRL (typically a pulse-width-modulated input voltage signal) and apply control logic and/or buffering to such input voltage to drive a positive-polarity control voltage vCTRLP to the gate terminal of switch 110 and to drive a negative-polarity control voltage vCTRLN to the gate terminal of switch 108, wherein vCTRLP and vCTRLN are each a function of vCTRL. In steady-state operation, switch 108 will generally be open when switch 110 is closed, and vice versa. When switch 108 is closed, current may flow from the voltage source generating the input source voltage VBAT through inductor 106, and inductor 106 may store energy. During this time, inductor 106 may have a voltage drop across it, with a positive-polarity at the terminal coupled to the input source voltage VBAT. When switch 108 is open and switch 110 is closed, the current flowing through inductor 106 may be reduced. Such change or reduction in current may be opposed by inductor 106 and the voltage polarity of inductor 106 may reverse (e.g., with a positive-polarity at the terminal coupled to generating the input source voltage VBAT). As a result, effectively two voltage sources are in series (input source voltage VBAT and the voltage across inductor 106) thus causing a voltage higher than VBAT to charge capacitor 107. If switches 108 and 110 are cycled fast enough, inductor 106 will not discharge fully in between charging stages, and the supply voltage VSUPPLY on capacitor 107 will have voltage greater than that of the input source voltage VBAT when switch 108 is opened. Thus, the supply voltage VSUPPLY generated by boost converter 102 will be a function of input control voltage VCTRL (e.g., the switching rate and/or duty cycle of a pulse-modulated signal) and the input source voltage VBAT.
Switched output stage 104 comprises two complementary legs, each leg comprising a pull-up device 112 (e.g., a switch, a p-type metal-oxide-semiconductor field effect transistor, etc.) coupled at its non-gate terminals between a supply voltage and an output node and a pull-down device 114 (e.g., a switch, an n-type metal-oxide-semiconductor field effect transistor, etc.) coupled at its non-gate terminals between a ground voltage and the output node. An amplifier predriver circuit 118 may receive an input voltage vIN (typically a pulse-width-modulated input voltage signal) and apply control logic and/or buffering to such input voltage to generate a positive-polarity input voltage VIN+ to be applied to the gate terminals of the pull-up device 112a and pull-down device 114a of a first leg and a negative-polarity input voltage VIN− to be applied to the gate terminals of the pull-up device 112b and pull-down device 114b of the other leg. Accordingly, switched output stage 104 generates a differential output voltage signal vOUT to its output node which is a function of vIN and VSUPPLY.
One disadvantage of boost converters is that the output voltage VSUPPLY of the boost converter may be susceptible to overshoot and ringing, which may ultimately affect the output voltage signal (e.g., vOUT) of a switched output stage to which the supply voltage is supplied. Such overshoot and subsequent ringing often occurs as a result of parasitic capacitances and inductances in the circuit resonating at their characteristic frequency, which decays over time due to resistances present in the circuit. For example, referring to FIG. 1, as switching node voltage vSW transitions between its maximum and minimum voltages, vSW may first overshoot such maximum or minimum voltages by an overshoot amplitude, and then oscillate about such maximum or minimum voltage as the ringing decays. Such overshoot and ringing may couple through switch 110, and thus may cause ringing on the supply voltage VSUPPLY which may in turn cause noise or distortion on the output voltage signal vOUT.
Traditional approaches to reduction of overshoot and ringing of the output voltage VSUPPLY of a boost converter include increasing the rise and fall times of the negative-polarity control voltage vCTRLN However, such approaches are not without disadvantages, as increasing rise and fall times places constraints on timing parameters (e.g., minimum duty cycle) associated with boost converter 102. FIG. 2 illustrates example voltage and timing graphs associated with boost converter 102 illustrated in FIG. 1, as is known in the art. As shown in FIG. 2, during a rising-edge transition of switching node voltage vSW, negative-polarity control voltage vCTRLN may decrease from its maximum voltage (e.g., a supply voltage) to a plateau voltage during a time period t1, and then remain at such plateau voltage during a period of time t2, before falling to zero. Also as shown in FIG. 2, vSW may transition from zero to its maximum voltage during time t2. Those of ordinary skill in the art may recognize that a long time period t1 places constraints on timing parameters (e.g., minimum duty cycle) associated with boost converter 102 and thus can negatively affect timing efficiency and power efficiency while not significantly improving electromagnetic interference. Conversely, long time period t2 will likely show reduced electromagnetic interference, overshoot, and ringing than a shorter time period t2. However, assuming a constant weak pull down strength from the gate terminal of switch 108 during each time period t1 and t2, any beneficial increase in time period t2 results in an undesired increase in time period t1.
Similarly, as also shown in FIG. 2, negative-polarity control voltage vCTRLN may increase from a ground voltage to a plateau voltage, and then remain at such plateau voltage during a period of time t2′, before rising to its maximum voltage during a period of time t1′. Also as shown in FIG. 2, vSW may transition from a maximum voltage to a ground voltage during time t2′. Those of ordinary skill in the art may recognize that a long time period t1′ places constraints on timing parameters (e.g., minimum duty cycle) associated with boost converter and thus can negatively affect timing efficiency and power efficiency while not significantly improving electromagnetic interference. Conversely, long time period t2′ will likely show reduced electromagnetic interference, overshoot, and ringing than a shorter time period t2′.